A multi-institution research team led by the National Institute of Standards and Technology (NIST) has published a landmark perspective paper identifying critical measurement and materials gaps in polymer-based semiconductor packaging - gaps with direct implications for the reliability of automotive electronics, including advanced driver-assistance systems (ADAS) and electrified powertrains.
Background
As transistor scaling approaches its physical limits, the industry faces mounting packaging challenges - from mechanical stress and distortion to environmental effects and failure mechanisms. Polymer-based packaging materials, once viewed as little more than adhesives or encasements for chips, have emerged as key factors in reliability, performance, and cost.
As the industry shifts toward 3D heterogeneous integration, where multiple chips are stacked or linked in three dimensions, demands on these materials are escalating rapidly. Unlike metals or ceramics, polymers are time- and temperature-sensitive, absorbing moisture and changing shape under stress. These behaviors can cause chips to warp, signals to degrade, or connections to fail over years of operation.
The automotive sector is acutely exposed to these failure modes. AEC-Q100, the Automotive Electronics Council's primary qualification standard for packaged integrated circuits, requires components to operate across temperature grades as wide as -40°C to 150°C and to sustain operational lifetimes of ten years or more, according to AEC documentation. AEC-Q100 Revision J introduced specific testing protocols for flip-chip ball-grid-array (FC-BGA) packaging, including thermal cycling, moisture sensitivity, and mechanical stress tests - directly targeting the polymer-dominated interfaces now under scrutiny.
Details
The perspective paper, titled "Material Needs and Measurement Challenges for Advanced Semiconductor Packaging: Understanding the Soft Side of Science," was published in IEEE Transactions on Components, Packaging and Manufacturing Technology (DOI: 10.1109/TCPMT.2025.3603484) and co-authored by researchers from NIST, North Carolina State University, the National Renewable Energy Laboratory, ASE Group, Intel Corporation, Innocentrix, and Binghamton University.
The work builds on a NIST-organized workshop, "Materials and Metrology Needs for Advanced Semiconductor Packaging Strategies," held at the 35th annual Electronics Packaging Symposium in Binghamton, NY, on September 5, 2024. It outlines critical challenges and opportunities related to polymer-based "soft" materials in advanced packaging, with emphasis on polymer science, metrology, and the strategic development of research-grade test materials (RGTMs). These efforts, led by the NIST CHIPS team, aim to advance fundamental understanding of structure-property-processing relationships, promote standardized guidelines for material characterization, and accelerate the qualification of next-generation packaging materials.
The paper highlights new measurement techniques under development at NIST - from advanced rheology and spectroscopy to stress measurements. These tools help track how polymers cure, shrink, and deform during manufacturing, factors that directly affect device reliability.
NIST is also pioneering RGTMs: open, nonproprietary polymer systems that serve as benchmarks. Unlike commercial "black box" materials, RGTMs allow researchers across industry, academia, and government to compare results, improve reproducibility, and feed reliable data into computer models.
Lead author Ran Tao of NIST highlighted the knowledge transfer challenge. "Polymer science is fascinating to polymer scientists, but that fundamental knowledge is often lacking in the packaging world," Tao stated. "Those fundamentals are valuable and can help guide industrial decision-making." Co-author William Chen, Chair of the IEEE's Heterogeneous Integration Roadmap for semiconductors, reinforced the point: "Modeling without metrology is imagination."
For automotive applications, the consequences of polymer-related packaging failures are particularly severe. Chiplet technology is becoming pivotal in automotive use cases, including ADAS and autonomous driving, with the shift expected to enable faster development and improved safety. However, the transition to multi-chip, 3D-stacked architectures intensifies thermomechanical demands on encapsulant and underfill systems - precisely the materials targeted by the NIST research.
Ongoing research into thermal interface materials (TIMs) and package substrates focuses on improving thermal conductivity by incorporating high-conductivity fillers into polymer matrices. Mechanical flexibility is cited as equally important as thermal performance.
Outlook
The perspective grew from the NIST-organized workshop, where experts from industry, universities, and government laboratories agreed on key priorities: rebuilding U.S.-based supply chains for packaging materials, creating shared databases of material properties, and advancing measurement standards.
With some new packaging materials taking 10 to 25 years to reach production, the authors stress that early, collaborative work is essential. For automotive procurement and R&D teams, the practical implication is clear: as AEC-Q100 qualification protocols evolve to address advanced packaging architectures including 2.5D and 3D-IC formats, the polymer characterization frameworks and RGTMs being developed under the NIST CHIPS program are expected to inform future industry test standards. Tier-1 automotive semiconductor suppliers integrating chiplets into ADAS processing units and EV powertrain control modules are among the most likely early stakeholders.
